PDP-8 MEMORY SIDE - ALL OPTIONS PRESENT

  3 3 3 3 3 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0  
6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1
MA W W R R R G G G G G G G CORE INHIBIT
DRIVER
RESISTORS
MA
0 0 6 6 6 0 0 0 0 0 0 0
2 2 1 1 1 0 0 0 0 0 0 0
4 6 3 3 3 7 7 7 7 7 7 7
MB W B B B B G G G G G G G MB
0 6 6 6 6 0 0 0 0 0 0 0
2 8 8 8 8 0 0 0 0 0 0 0
4 4 4 4 4 8 7 7 7 7 7 7
MC W B B B B W - R R R R G G ¦ G G W W ¦ ¦ R ¦ ¦ ¦ ¦ ¦ ¦ ¦ ¦ ¦ ¦ R R R S S MC
0 6 6 6 6 6 - 6 6 6 6 2 2 ¦ 2 2 6 6 ¦ ¦ 6 ¦ ¦ ¦ ¦ ¦ ¦ ¦ ¦ ¦ ¦ 1 1 1 2 2
2 8 8 8 8 4 - 5 5 5 5 0 0 W 0 0 1 0 W W 5 G G G G W W G G G G 5 5 5 0 0
4 4 4 4 4 0 - 0 0 0 0 8 8 0 8 8 2 7 3 3 0 2 2 2 2 0 0 2 2 2 2 1 1 1 3 3
MD W W B B B B W R R R R R G 2 G G B B 0 0 B 0 0 0 0 2 2 0 0 0 0 R R R S S MD
0 0 6 6 6 6 6 6 6 6 6 6 2 5 2 2 3 1 0 0 2 9 9 9 9 5 5 9 9 9 9 2 2 2 2 2
2 2 8 8 8 8 4 5 5 5 5 5 0 ¦ 0 0 6 0 ¦ ¦ 0 ¦ ¦ ¦ ¦ ¦ ¦ ¦ ¦ ¦ ¦ 0 0 0 0 0
4 4 4 4 4 4 0 0 0 0 0 0 8 ¦ 8 8 0 4 ¦ ¦ 4 ¦ ¦ ¦ ¦ ¦ ¦ ¦ ¦ ¦ ¦ 1 1 1 5 5
ME W W W W W W W - R R R S R R R S S S S R S - B B B B S R S S S S S R R R ME
0 0 0 0 0 0 0 - 6 6 6 2 2 2 2 2 2 1 1 0 1 - 1 1 1 1 1 0 1 1 1 6 6 2 2 2
2 1 1 1 1 1 1 - 5 5 5 0 2 2 2 0 0 0 1 0 1 - 3 3 3 3 1 0 0 0 1 0 0 0 0 0
4 1 1 1 1 1 1 - 0 0 0 5 0 0 0 3 2 7 1 2 1 - 0 0 0 0 1 2 7 7 1 3 3 1 1 1
MF W W W W W W W - R R R W R R R S R W S S - - - B B S S B B R R W R S R S MF
0 0 0 0 0 0 0 - 6 6 6 0 2 2 2 6 4 5 6 6 - - - 1 1 2 6 1 3 1 1 6 0 1 0 1
2 1 1 1 1 1 7 - 5 5 5 5 2 2 2 0 5 0 0 0 - - - 3 3 0 0 0 6 2 2 4 0 1 0 1
4 1 1 1 1 1 0 - 0 0 0 0 0 0 0 3 0 1 3 3 - - - 0 0 2 3 4 0 3 3 0 2 1 2 1